Senior RTL Design Engineer

Updated: May 09, 2024 02:53 AM GMT

European Recruitment

Grenoble

Senior RTL Design Engineer

We are working with an exciting tech company who provide innovative hardware and software technologies for high-performance, data centric computing markets.

They are now looking to add an experienced RTL Designer to their growing hardware team in Grenoble.

Key Roles and Responsibilities:
• Work on the full development of the new generation of high-performance processors in advanced technology nodes
• Work on the IP and subsystem specifications, the micro architecture, the design, and the synthesis of various blocks inside the chip

Key Skills and Experiences:
• 5+ years of experience in ASIC or FPGA digital RTL design
• Experience in SOC interconnects dimensioning, high-speed interface design/integration, processors design
• RTL design (VHDL or Verilog) skills
• Familiar with clock and reset scheme, Synthesis and SDC constraints, formal proof, CDC structures

Keywords: RTL Design / ASIC/ FPGA / SOC / Verilog / VHDL

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