Junior FPGA Designer

Updated: May 10, 2024 09:13 AM GMT

ELT Group

Bracciano, Metropolitan City of Rome Capital

Main Responsibilities
• Definition of Technical specifications, hardware requirements and implementations for digital designs targeting FPGAs (SoC)
• Planning and follow-up of activities during all the phases of Hardware and Firmware development and life cycle in compliance with programme and product requirements
• Project scheduling and report writing with respect to the Company internal rules, normative procedures and deadlines
• Responsible for Hardware and Firmware requirements analysis, design, test, integration and validation activities
• Design methodologies based on the reuse of Intellectual Properties (IPs)

Technical Requirements
• Programming and Scripting Languages: C/C++, TCL, Python, shell-scripts
• Knowledge of RTL design and verification methodologies, HDL code (VHDL, Verilog), pre/post synthesis simulations, Static Timing Analysis
• Knowledge of Model Based design methodologies (Matlab Simulink, System Generator, DSP Builder, HDL Coder)
• Knowledge of Intel and Xilinx... More Detail